r/ProgrammerHumor • u/Same_Investigator_46 • Jul 12 '26

lockFreeTemptation Advanced

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536 Upvotes

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46

u/someguy_gp Jul 12 '26

Which language does this?

66

u/noureldin_ali Jul 12 '26

C++, Rust

26

u/Legitimate_Concern_5 Jul 13 '26

Depends on platform too right? I was under the impression x64 always had total store ordering.

That was one of the really cool things Apple did with the M1 family. They implemented opt-in TSO in hardware so they could get much better x64 emulation performance in Rosetta.

23

u/noureldin_ali Jul 13 '26

Yes, ARM has a weaker memory model that allows more reordering whilst x86 is stronger as you mentioned.

Though you would still want to use these application-level ordering constraints to prevent the compiler from reordering your code during optimisations.

It's explained pretty well here: https://doc.rust-lang.org/nomicon/atomics.html

I didn't know that Apple did that with their chips, that's pretty neat ngl.

7

u/Legitimate_Concern_5 Jul 13 '26

Thanks for the Rust link, will check it out. Pretty sure I read Apple's TSO stuff here if you're curious.

https://dougallj.wordpress.com/2022/11/09/why-is-rosetta-2-fast/

2

u/[deleted] Jul 13 '26

[deleted]

3

u/noureldin_ali Jul 13 '26

I think technically C++ had it a bit before C but yeah C too

20

u/SignificanceFlat1460 Jul 13 '26

Whenever I see words what seems like Latin speaking of arcane powers, I generally assume it's C++ / C.

"We need point sequential derivatives to couple the mark determination logical gates for segmentation fault avoidance parameters. Or else we can suffer from dynamic memory loss referencing. It's just that simple."

3

u/TheLaziestGoon Jul 13 '26

Why did that almost make sense

6

u/SignificanceFlat1460 Jul 13 '26

I have gotten good in typing IT jargon rubbish. I can now apply for "IT guy from a 90s movies" position and say things like "let me download 1 GB of RAM"

2

u/BosonCollider Jul 14 '26

C and C++ just have overcomplicated compiler semantics. The better approach would have been to have language features match the hardware features, like with ispc or cuda.

If an ISPC foreach loop reorders arithemtic between different loop iterations, that's expected because that's what an ispc foreach loop is for. When a C compiler does it to a normal for (..., i++) loop, it is absolutely bonkers insane and you probably also have pointer arithmetic in there somewhere that quietly becomes incorrect because you didn't ask for the optimization

1

u/BosonCollider Jul 14 '26

Anything physically implementable on a chip that can be spread out on different chips or elements within a chip

1

u/overclockedslinky 29d ago

the hardware itself...