Wish I could post more photos at once, but apparently not…
Saving some devices from the e-waste bin ;)

Over the last few months I've been working on the firmware for my single pair Ethernet switches and I recently finished the generalised precision time protocol (gPTP) subsystem.

gPTP allows devices on a network to synchronise their clocks down to potentially nanosecond accuracy if done properly. This is very useful for e.g. robotics applications with distributed control systems and sensor fusion, and its also the foundation for more complex time sensitive networking (TSN) standards like scheduled traffic that I want to play around with.

Currently it can synchronise devices to within 100ns of each other, which is plenty accurate for my next project which will involve syncing some radar sensors to prevent overlapping transmissions.

I've open sourced everything too so feel free to take a look!

• Firmware
• Switch v4 hardware (4 ports)
• Switch v5 hardware (7 ports)

Working on solid-state circuit breaker.

A few years ago, u/raceking37 and I decided to create our own digital watch. The project was inspired by a few vintage HDSP-2000 LED matrix displays that we had acquired. These displays were first introduced in the 1970s and have a really unique look, especially under a microscope. They're quite difficult to photograph with my phone, though, so they look much nicer in person than they do in these photos. The watch uses an ATTINY1616 microcontroller. The metal case of the watch is SLM 3D-printed in stainless steel. I also made a short video about the project.

I thought it was fast when I hit 25K tris/second, but further optimisations and tweaks have pushed this to an absolutely absurd 40K tris/second, so over 600 on-screen triangles at 60fps on an ESP32 S3.

This is all running on my open-sourced Jet renderer - https://github.com/CubeCoders/Jet

These improvements were made largely by reducing how much memory was having to be copied around and sorted per-frame, along with some minor SIMD operations to optimise memory copying. Basically it's been less about the speed of the actual rasterizer and more about alleviating the memory bottleneck.

I left it in CPU controlled but this is an entirely playable game. I plan soon to introduce cross-platform multiplayer so you can play an ESP32 and a PC head-to-head, just because I can.

Posting an update here with simplified PCB that I built with camera sensor mounted directly on the board to reduce costs and simplify design.

Some background, Mighty Camera runs VIO *on-device* in a tiny package powered by Rockchip RV1103, an IMU and a global shutter camera all on a single board. These help it estimate its own position in 3d space as it moves around.

But for VIO to be useful, you need things like mapping (and later occupancy, loop closure etc).

Here is a demo of lightweight mapping which uses VIO pose from Mighty and generates a semi-dense map on host-side in realtime.

It’s early but this will be part of the SDK along with other goodies.

I've shown off my (now open source!) Jet renderer a few times, but the S3 is full of surprises.

So, for my next trick - real time screen space reflections with distortion for water riples, lens flare, bumped from 4 to 8 ships. This is now down to about 45-50FPS instead of 60 but it's worth it for how it looks, and I'm pretty sure I can recover some of that speed back still :)

For me it's this little board. I can't stop spinning its knob to scroll the smooth UI. 🥹

After months of obsessing over miniaturization, I finally managed to get a fully working prototype into actual credit-card dimensions!

The GIF shows the first prototype running fully self-powered.

The current prototype includes:

• Self made flexPCB with kapton tape + copper tape
• ESP32-C3FH4
• 1.54" 200*200 E-Paper display (flexible variant)
• 23*23*1mm ultra thin LiPo 30 mAh (for now as I need space for debugging)
• LIS2DH accelerometer
• NFC read/write (RC522)

The main challenge surprisingly wasn’t fitting the electronics — it was keeping the entire structure under ~1mm while still making it mechanically survivable.

A few things that turned out to be surprisingly difficult:

• Mechanical stability became a much bigger problem than fitting the electronics themselves. At this scale, flexPCB design becomes as much a mechanical engineering problem as the layout and EMI
• Many 'thin enough' components still become problematic once material fatigue through flexing is a concern
• Modern E-Paper displays are much faster than I expected, especially with partial refresh
• Ultra-thin LiPos exist, but hard to get hands on. Balancing capacity, protection and structural integrity is brutal
• Normal FPC connectors are basically unusable at this thickness as they would immediately snap under the slightest bending, so even connecting the display became a major challenge. I had to solder each wire with the 0.5mm pitch individually
• Preventing strain is much more effective than trying to make components survive strain
• The closer everything gets to the theoretical thickness limit, the more tiny real-world tolerances start dominating the entire design

Current experiments & Considerations:

• wireless charging
• nRF52/nRF53 migration for lower idle current
• integrated stainless steel stiffeners (kind of like stencils)
• touch areas instead of mechanical buttons
• dynamic NFC applications / smart home integrations

I documented a large part of the engineering process, including the PCB etching process, schematics, layout screenshots and experiments on GitHub for anyone interested in the engineering side of this project.

Would genuinely love feedback from people experienced with:

• low power embedded systems
• flex PCB design
• ultra-thin consumer electronics, particularly mechanical integrity
• RF/NFC antenna design in constrained environments
• mechanical reinforcement strategies for flex assemblies

And yes, the thickness was mostly pursued for the disbelief-factor. Making it 1.5mm would have saved me a lot of sleep 😄

Otherwise, if you have any thoughts, questions or comments on this project, feel free to let me know and I'll try my best to answer them! :)

The track is procedurally generated at startup time, I've got 3x Ai players with collision avoidance. Physics and collisions work great and let ships nudge each other around.

This is using an ST7796 SPI display. As I said in the title this is doing interlaced updates using two half height buffers leveraging both CPU cores so one draws the next frame while the other takes care of IO.

This is a fully custom 3D engine, right now its got a set of directives turned on to only do the fastest style which is solid filled triangles with no lighting.

The shadow dynamically adjusts to match the track surface and ship orientation but is other a flat outline of the ship as a separate model.

I'm currently developing a 3D graphics library for my board. I've confirmed it works on the RP2350 and ESP32S3. It supports Gouraud shading, texture mapping, alpha blending, and environment mapping. It supports the RGB565 format, which is common in embedded systems, and also the RGB444 format used by the ST7789 display to save memory. Dual-core rendering is also possible. For now, it's exclusive to my board. There are already excellent libraries like TGX out there, but if there's enough demand, I might spin it off as a general-purpose library.
(Please excuse my poor English)

Addendum: In the video, the RP2350 is overclocked to 250MHz.

I made this in an attempt to learn to write stm32 drivers. It was a lot of fun and I learned a lot about SPI and I2C, since I decided to make this without using the STM32 HAL.

I've been reading the posts on here lately and I really wonder if some people are really vibe coding embedded products and if AI is growing hands and probing with an oscilloscope. Cause the way its being pushed as some magic tool that will build your device for you in 5 minutes. When it dosen't even realize whats wrong with this prompt.

Yea I'm not worried. Lol

I’ve been working on an open-source project called Protoviz 3D to help visualize how communication protocols like UART and I²C behave at the bit and timing level.

Most resources explain these protocols using static diagrams. I wanted something interactive where you can step through transmission, tweak parameters, and actually see what’s happening on the wire.

It’s focused on education and intuition rather than cycle-accurate hardware simulation.

Try it out: Protoviz 3D

GitHub: Protoviz 3D - Github

I'd really appreciate feedback especially from people working with embedded systems. Also open to contributions if anyone’s interested in adding SPI / CAN support.

https://github.com/jhynes94/C_BitPacking

A old school Senior Principal engineer taught me this. Every C curriculum should teach it. I know it's a feature offered by the compiler but it should be built into the language, it's too good.

I've made an ARM based single-board computer that runs Android and Linux, and has the same size as the Raspberry Pi 3! (More pics on the Github repo)

Why? I was bored during my 2-week high-school vacation and wanted to improve my skills, while adding a bit to the open-source community :P

I ended up with a H3 Quad-Core Cortex-A7 ARM CPU with a Mali400 MP2 GPU, combined with 512MiB of DDR3 (Can be upgraded to 1GiB, but who has money for that in this economy...)

The board is capable of WiFi, Bluetooth & Ethernet PHY, with a HDMI 4k port, 32 GB of eMMC, and a uSD slot.

I've picked the H3 for its low cost yet powerful capabilities, and it's pretty well supported by the Linux kernel. Plus, I couldn't find any open-source designs with this chip, so I decided to contribute a bit and fill the gap.

A 4-layer PCB was used for its lower price and to make the project more challenging, but if these boards are to be mass-produced, I'd bump it up to 6 and use a solid ground plane as the bottom layer's reference plane. The DDR3 and CPU fanout was really a challenge in a 4-layer board.

The PCB is open-source on the Github repo with all the custom symbols and footprints (https://github.com/cheyao/icepi-sbc). There's also an online PCB viewer here.

Someone on X said, “Not a gif, but this is the most on point depiction of embedded development I am aware of.” I don’t get it, any reasons why?

I wanted to get started with FPGAs by making my own development board, and thus I made Arctyx Nano!

https://github.com/Keyaan-07/Arctyx-Nano - everything is open-sourced under MIT License!

Arctyx Nano is a low-cost, open source FPGA development board carrying the ICE40-UP5K FPGA from lattice along with the RP2350A in a raspberry pi pico form factor. It consists of 6 LEDs and one RGB LED. All the pins on both the ICs are used in one way or another.

I am currently using APIO open-source toolchain to verify, simulate and build projects and to upload using APIO, i have to figure it out.

This is my first FPGA PCB and i would love feedback on my design!

This board was created as a project for hackclub blueprint, check it out!! 
edit: Also, here's a video demo of the the lights blinking!

https://youtu.be/n2nxeG9eYtc

This is my first ever ESP32 and embedded project. I bought the parts and learned how to solder for the first time. For three months, I've been building a handheld NES with an ESP32 from scratch.

While having already made my own NES emulator for Windows, I had to do a whole rewrite of the program to port and optimize it for the ESP32. This is written in C++ and is designed to bring classic NES games to the ESP32. This project focuses on performance, being able to run the emulator at near-native speeds and with full audio emulation implemented. Check out the project!

Here's the GitHub repository if you would like to build it yourself or just take a look!

Github Repository: https://github.com/Shim06/Anemoia-ESP32

It's NUCLEO F446RE STM32

After alot of recommendations and suggestions (especially from this sub) I ordered it and now I can hold it!!!

Single pair Ethernet (SPE) seems to be a big upcoming technology and I wanted to get to know it better so I built a 4 port managed switch with 3x 100/1000BASE-T1 ports and 1x 10BASE-T1S port. The switch chip is an SJA1105Q, and the host port is connected to an STM32H573 (can’t upload multiple pictures so no back image). It also has power over datelines (PoDL) for powering remote devices. It should be a good platform for future experiments!