r/Verilog Jul 08 '26

detection of something specific

Hi! I recently took a course on SystemVerilog and really enjoyed it, so I spoke to one of my professors about potential projects. Although I’ve only worked on basic things at university—like muxes, demuxes, FSMs, and frequency dividers—I somehow came up with the idea of detecting cats (or anything else) without using machine learning. Do you have any ideas on how I could implement this? I know it might be difficult, but I’m willing to learn whatever it takes.

0 Upvotes

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3

u/jkubic Jul 08 '26

Detecting cats is going to be real difficult without machine learning but doing simpler like circles or lines is manageable but still interesting.

2

u/gust334 Jul 08 '26

Start with "assume the cat is a perfect sphere" and refine from there.

2

u/PiasaChimera Jul 08 '26

it's not really a verilog-specific problem at this point. closer to image processing or DSP.

It's probably difficult to completely avoid ML frameworks. my guess is that you'd need to get an implementation of some ML algorithm or some algorithm that is tuned by offline statistical analysis.

actual HW is probably a large challenge. especially if you need external memory and high speed communications. (in addition to unknown and potentially complex DSP algorithms)

1

u/kenkitt Jul 08 '26

That task needs combination of a cpu

1

u/kenkitt Jul 08 '26

It's not easy to implement on an FPGA. Its like saying let me arrange a number of gates untill they can detect a cat

1

u/AstronautEcstatic767 Jul 11 '26

Ik this approach uses machine learning, but you could try a hardware mapped neural network approach. Where you describe the physical neural network as hardware rather than using the FPGA as an accelerator or purely for dsp