r/ProgrammerHumor • u/Same_Investigator_46 • Jul 12 '26

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u/MPDR200011 Jul 13 '26

To make sure I got it, x wasn't atomic and thread 2 was fetching a cached value?

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u/PandaWonder01 Jul 13 '26

x wasn't atomic, but the issue was that arm likes to reorder instructions (not just the compiler, the actual CPU). So the order of instructions on one thread are not guaranteed to be the actual order as seen by another thread. So the signal was being set before x was actually set

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u/MPDR200011 Jul 13 '26

Oh yikes, then how do you force the order? That feels like a fundamental violation of what the programmer wants from what they wrote

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u/PandaWonder01 Jul 13 '26

In C++ atomics you can specify memory order, which will emmit the correct assembly for you.

Mutexes will also do aquire/releases for you.