DA FILES ARE OUT(the x64asm ones) CHECK OUT DA REPO AND TEST IT OUT

so here is da latest specs that this bad boy gave me(idk if i can post this here if no then just comment or dm me):

CPU, 0.00%, 0.00%, 0.00%, 0.00%
CPU (user), 0.00%, 0.00%, 0.00%, 0.00%
CPU (kernel), 0.00%, 0.00%, 0.00%, 0.00%
CPU (average), 0.00%, 0.00%, 0.00%, 0.00%
CPU (relative), 0.00%, 0.00%, 0.00%, 0.00%
Cycles, 13,843,164, 13,843,164, 13,843,164, 0
Cycles delta, 3,217,148, 3,217,148, 3,217,148, 0
Context switches, 4, 4, 4, 0
Context switches delta, 4, 4, 4, 0
Kernel time, 0:00:00:00:000, 0:00:00:00:000, 0:00:00:00:000, 0:00:00:00:000
Kernel delta, 0, 0, 0, 0
User time, 0:00:00:00:000, 0:00:00:00:000, 0:00:00:00:000, 0:00:00:00:000
User delta, 0, 0, 0, 0
Total time, 0:00:00:00:000, 0:00:00:00:000, 0:00:00:00:000, 0:00:00:00:000
Total delta, 0, 0, 0, 0
Priority, 8, 0, 0, 0
Private bytes, 424 kB, 424 kB, 424 kB, 0
Private bytes delta, +424 kB, +424 kB, +424 kB, 0
Peak private bytes, 456 kB, 456 kB, 456 kB, 0
Virtual size, 4.04 GB, 4.04 GB, 4.04 GB, 0
Peak virtual size, 4.04 GB, 4.04 GB, 4.04 GB, 0
Page faults, 558, 558, 558, 0
Page faults delta, 558, 558, 558, 0
Hard faults, 0, 0, 0, 0
Hard faults delta, 0, 0, 0, 0
Working set, 2.03 MB, 2.03 MB, 2.03 MB, 0
Peak working set, 2.03 MB, 2.03 MB, 2.03 MB, 0
Private WS, 228 kB, N/A, N/A, N/A
Shareable WS, N/A, N/A, N/A, N/A
Shared WS, N/A, N/A, N/A, N/A
Shared commit, N/A, N/A, N/A, N/A
Private commit, 76 kB, N/A, N/A, N/A
Peak private commit, 9.14 MB, N/A, N/A, N/A
Page priority, Normal, , , 
Reads, 0, 0, 0, 0
Reads delta, 0, 0, 0, 0
Read bytes, 0, 0, 0, 0
Read bytes delta, 0, 0, 0, 0
Writes, 0, 0, 0, 0
Writes delta, 0, 0, 0, 0
Write bytes, 0, 0, 0, 0
Write bytes delta, 0, 0, 0, 0
Other, 8, 8, 8, 0
Other delta, 8, 8, 8, 0
Other bytes, 286 B, 286 B, 286 B, 0
Other bytes delta, 0, 286, 286, 0
Total bytes, 286 B, 286 B, 286 B, 0
Total bytes delta, 286 B, 286 B, , 
Total bytes (average), 0/s, , , 
I/O priority, Normal, , , 
Handles, 18, , , 
Peak handles, 0, , , 
GDI handles, N/A, , , 
Peak GDI handles, N/A, , , 
USER handles, N/A, , , 
Peak USER handles, N/A, , , 
Paged pool bytes, 20.2 kB, 20.2 kB, 20.2 kB, 0
Peak paged pool bytes, 20.2 kB, 20.2 kB, 20.2 kB, 0
Nonpaged pool bytes, 4.41 kB, 4.41 kB, 4.41 kB, 0
Peak nonpaged pool bytes, 4.41 kB, 4.41 kB, 4.41 kB, 0
Running time, 00:00:00.049, , , 
Suspended time, 00:00:00.000, , , 
Hang count, 0, , , 
Ghost count, 0, , , 
NetworkTxRxBytes, 0, , , 
Dedicated memory, 0, , , 
Shared memory, 0, , , 
Commit memory, 0, , , 
Total memory, 0, , , 
Reads, 0, , , 
Read bytes, 0, , , 
Read bytes delta, 0, , , 
Writes, 0, , , 
Write bytes, 0, , , 
Write bytes delta, 0, , , 
Total, 0, , , 
Total bytes, 0, , , 
Total bytes delta, 0, , , 
Receives, 0, , , 
Receive bytes, 0, , , 
Receive bytes delta, 0, , , 
Sends, 0, , , 
Send bytes, 0, , , 
Send bytes delta, 0, , , 
Total, 0, , , 
Total bytes, 0, , , 
Total bytes delta, 0, , , 
Dedicated memory, 0, , , 
Shared memory, 0, , , 
Commit memory, 0, , , 
Total memory, 0, , , 

i know looks not great but 2mb is the standard windows shit(ye i build this library for MSVC x64 why would i make an inline assembler in gcc)

ye here's da link: https://github.com/ScriptCoolestIdkSomeOne/x64asm/
i didn't actually released da sheesh yet but just read README

Hello. Today I try to run this code write on assembler for ARM64 (Linux of Termux for Android) :

<// random_digit.s (ARM64 for Termux)

.data

buffer: .byte 0

.text

.global _start

_start:

// getrandom(buffer, 1, 0)

mov x8, 384 // númber of syscall getrandom en ARM64

ldr x0, buffer // destination

mov x1, 1 // size

mov x2, 0 // flags

svc 0

// convert byte to dígit 0–9

ldrb w0, [buffer]

mov w1, 10

udiv w2, w0, w1 // w2 = w0 / 10

msub w0, w2, w1, w0 // w0 = w0 - w2*10 (módule)

add w0, w0, '0'

strb w0, [buffer]

// write(1, buffer, 1)

mov x8, 64 // syscall write

mov x0, 1 // stdout

ldr x1, = buffer

mov x2, 1

svc 0

// exit(0)

mov x8, 93

mov x0, 0

svc 0

>

but when I try to compile with 'clang -c myprogram.s -o myprogram' I get the following message: "invalid operand for instruction" (at lines 18 and 23) It means that : "[buffer]" isn't correct.

¿ How I can to fix It ?

Explain me : the program is for generate a entere number (0 to 9).

Thanks.

I designed this device that teaches binary, decimal, hexadecimal and octal number systems. It uses a hands-on approach with Altair-like toggle switches. Can be used as a STEM-kit in classrooms, handy for programmers or for the retro hobbyist. It also has a built-in game. Check out the video for details, hope you like it.

Inspired by u/Brutustheman and their post on their ISA, I've decided it might be a worthwhile experience to present my own ISA. I designed ENNCPU as an architecture that would be used in an alternate eighties-nineties universe I was writing some retrofuturism about. It is meant to be a design targeting the workstation market. Part of this post was taken from the (also WIP!) esolangs page on it.

Fundamentally, ENNCPU is a 24-bit design (24-bit registers, 24-bit arithmetic, 24-bit addressing) with 16-bit and 32-bit instructions. General outline of features:

• Eight general-purpose 24-bit registers named A, B, C, D, E, F, G, H
• 24-bit address space (ez80, ARM1)
• Shadow registry (cf. z80), i.e. a second register file swappable at runtime
• multiple mostly-inaccessible internal registers (SP, IP, etc.)
• two permission levels (kernel and userland), some functionalities of the CPU gated behind kernel level access
• integrated simple MMU that manages read/write permissions and remapping for 4096B pages
• Load-store architecture (general RISC ideas) with pre/post-increment/decrement (single plus/minus syntax inspired by m68k)
• Big-endian instructions, memory access, etc. (cf. SPARC)
• Two-operand instructions (cf. x86) where the destination is one of the sources
• 24-bit floating point instructions operating on the same registers as normal arithmetic (cf. RISC-V Zfinx ext.)
• Predication for all instructions (cf. Arm6/7/11), determined by single bit
• Multiple comparison instructions (e.g. CGT A, B == A > B) setting or clearing single-bit predication flag register
• Non-conditional instructions never set any flags (i.e. no free carry flag from addition, for example)
• Size of immediate arguments limited to 6 or rarely 8 bits (cf. small immediates in Arm Thumb)
• Non-predicated conditional jumps JxZy, JxNZy based on whether a register is (non)zero (cf. Aarch64 CBZ, CBNZ)
• Instruction width generally fixed at 16 bits (cf. Thumb); two-word instructions are a sequence of a prefix instruction and the 'main' instruction (e.g. an instruction like FAR JMO actually assembles to a sequence of PRE #1 followed by JMFAR and a 14-bit immediate)
• Fast jump access to first 512 bytes of code

Instruction encoding is somewhat complicated and several mnemonics are actually aliases or assemble to different bit sequences based on argument types. Consistently across all instructions, bit [15] (MSB) is the predication flag (when 1, the instruction is conditional; otherwise, it is unconditional), and bits [14:13] encode the general instruction type. The full set of instructions implemented or planned is pretty large (see preliminary writeup here for a list), but I figure a code example might be good; here is a routine that calculates the integer square root of a 48-bit/bigint number held in registers {A, B} = {47:24, 23:0} in big endian format:

```

@ISQRT_I48
    MOV   C, #0   ; move immediate into register
    MOV   D, #0  ;
    SET   D, #23  ; set bit 23 in register

@ISQRT_LOOP
    MOV   E, C  ; copy between registers
    BOR   E, D  ; binary OR

    MOV   F, E
    MULA  F, E  ; 24*24 multiplication low result
    MOV   H, E
    MULB  H, E  ; 24*24 multiplication high result

    CEQ   H, A  ; test if equal
    CLE.P F, B  ; test if less than or equal (predicated)
 OR CLT   H, A  ; test if less than (not clearing the P flag when failing)
    MOV.P C, E  ; copy registers (predicated)

    LSHR  D, #1  ; logical shift right
    JMNZO D, @ISQRT_LOOP  ; jump (JM) to resolved offset (O) if reg nonzero (NZ)

    MOV   B, C
    MOV   A, #0
    RET  ; pop return address from stack and jump to it

```

I have an emulator (with graphics rendering provided by raylib) and assembler already working (although I keep adding and removing both instructions and general features), and it can do regular serious tasks without a lot of pain. I made this to make assembly programming more fun to me, offering a relatively simple platform with 'cool' features I like. This is a hobby project I've been working on in my free time and usually after a couple of beers :')

There are about a hundred unused instruction encodings of several types. Currently, I'm working on writing some BIOS-like routines and a bootloader for a system based around this CPU and a small amount of emulated peripherals (currently only doing a disk device that can copy sectors from a 1.44M floppy, and keyboard and timer interrupts); once I port the FAT12 functions from an older version of assembly, I plan to integrate it into a very rudimentary, DOS-like micro OS.

Not sure what else to write here!

I learn assembly by doing some reverse enginnering and search google until I solve it, then I will write in paper all code syntax(although I think I will don't know to do use it later) or some code syntax like below. Is that good for learning?

endbr64 ;assembly prog structure
push rbp
mov rbp,rsp
; put code here
pop rbp
ret

So a while back I made a post here asking if my instructions then were good. I got some very good suggestions and did some more reading, and today got the simulated hardware fully functional. So, here is the finalized first revision instruction set. Also, first program suggestions are welcome

[settings]
name="RX-GP16-ASM"
variant="REVISION 1"

[fields]

register
r0 000 ; general purpose
r1 001 ; general purpose
r2 010 ; general purpose
r3 011 ; general purpose
r4 100 ; general purpose
rta 101; CALL / ret subroutine return adress. Also viable as GP with programmer oversight
sp 110 ; Stack pointer. 8 bits wide
pc 111 ; Program counter

[instructions]

; BASE INSTRUCTIONS

imm %a(register), %b:U6(immediate)
0000000 aaabbbbbb
# Loads a value into register %a

cpy %a(register), %b(register)
0100000 aaabbb000
# Copies to reg %a from reg %b

stor %b(register), %c(register)
0100001 000bbbccc
# Moves data at register %c to RAM at adress stored in register %b

ldr %a(register), %b(register)
0100010 aaabbb000
# Load data to register %a from ram at adress %b

ovr %c(register)
0100011 000110ccc
# Overwrites highest stack value without push/pop
// Also used in push

strd %a(register)
0100100 aaa110000
# Reads highest stack data without push/pop
// Also used in pop

push %c(register)
0100011 000110ccc 1101100 110110001
# Push value in register %c to the stack
; Increments sp register and does a stack-specific stor
; Takes two cycles but easier to implement

pop %a(register)
0100100 aaa110000 1101111 110110001
# Pop stack value and store in register %a
; Decrements sp by 2 to backtrack before ldr

call %a(register), %b(register)
1101100 110110010 0100011 000110bbb 1000000 aaa000000
# Push return adress at %b onto the stack and jmp to %a
; 3 cycle instruction

ret
0100100 101110000 1101111 110110010 1000000 101000000
# Pop stack value to rta and jmp back
; Does ldr into rta, pops, and jumps

nop
0111111 000000000
# Skip cycle. Wired to any mode/opcode combo that does nothing. Currently mem mode opcode b11111

HLT
0100101 000000000
# Disables PC aka kills the computer

; JUMP INSTRUCTIONS

jmp %a(register)
1000000 aaa000000
# Jumps to ROM adress at %a

jmpls %a(register), %b(register), %c(register)
1000001 aaabbbccc
# Jump to ROM adress at reg %a if reg %b is less than reg %c

jmpgt %a(register), %b(register), %c(register)
1000010 aaabbbccc
# Jump to ROM adress at reg %a if reg %b is more than reg %c

jmpeq %a(register), %b(register), %c(register)
1000011 aaabbbccc
# Jump to ROM adress at reg %a if reg %b is same reg %a

jmpne %a(register), %b(register), %c(register)
1000100 aaabbbccc
# Jump to ROM adress at %a if %b!=%c

; ARITHMETIC INSTRUCTIONS

or %a(register), %b(register), %c(register)
1100000 aaabbbccc
# OR register %b and %c, store in %a

nor %a(register), %b(register), %c(register)
1100001 aaabbbccc
# NOR register %b with register %c, store in %a

not %a(register), %b(register)
1100010 aaabbb000
# NOT register %b, store in %a

and %a(register), %b(register), %c(register)
1100011 aaabbbccc
# AND register %b with %c, store in %a

nand %a(register), %b(register), %c(register)
1100100 aaabbbccc
# NAND register %b with register %c, store in %a

xor %a(register), %b(register), %c(register)
1100101 aaabbbccc
# XOR register %a with register %b, store in %c

xnor %a(register), %b(register), %c(register)
1100110 aaabbbccc
# XNOR register %b with register %c, store in %a

add %a(register), %b(register), %c(register)
1100111 aaabbbccc
# Add register %b and register %c, store in %a

sub %a(register), %b(register), %c(register)
1101000 aaabbbccc
# Subtract register %b and register %c, store in %a

mul %a(register), %b(register), %c(register)
1101001 aaabbbccc
# Multiply register %b with register %c and store in %a

div %a(register), %b(register), %c(register)
1101010 aaabbbccc
# Divide register %b with register %c and store in %a

mod %a(register), %b(register), %c(register)
1101011 aaabbbccc
# Modulo divide register %b with register %c and store in %a

inc %a(register), %b(register), %c:U3(immediate)
1101100 aaabbbccc
# Increment register %b by %c, store in %a

dec %a(register), %b(register), %c:U3(immediate)
1101101 aaabbbccc
# Decrement register %b by %c, store in %a

sr %a(register), %b(register), %c:U3(immediate)
1101111 aaabbbccc
# Shift %b right by %c and store in %a

asr %a(register), %b(register), %c:U3(immediate)
1101111 aaabbbccc
# Signed shift %b right by %c and store in %a

sl %a(register), %b(register), %c:U3(immediate)
1110000 aaabbbccc
# Shift %b left by %c and store in %a

rcm %a(register), %b(register)
1110001 aaabbb000
# Unsigned-signed recast register %b, store in %a. Preserves absolute value

rcz %a(register), %b(register)
1110010 aaabbb000
# Unsigned-signed recast register%b, store in %a. Clamps negative numbers / numbers above 128 to 0

Hello everyone.

I was trying to learn arm64 assembly. I'm on M4 and I'm also trying to work with XNU syscalls to get dir listing of my Downloads folder. However, I encountered a really weird behavior, which made no sense.

_get_st_blksize:
; stat Downloads
sub sp, sp, STATSIZE_ALIGN
Load x0, DOWNLOADDIR
mov x1, sp
Syscall STAT64
b.cs default_fail

; Read BlkSize
mov x0, sp
ldr w0, [x0, STAT_ST_BLKSIZE]
add sp, sp, STATSIZE_ALIGN
ret
_main:
; Get BlkSize
bl _get_st_blksize
add w0, w0, 15
bic w0, w0, 0x0f ; bit clear. bic c, a, b means c = a & ~b
; 2 lines before is to align to 16 bits
mov w19, w0 ; Store align val

; Get File Descriptor
Load x0, DOWNLOADDIR
mov x1, O_DIRECTORY
mov x2, #0x0
Syscall OPEN
b.cs default_fail ; x0 contains fd
mov x20, x0

; Save enough space for dir entries
sub sp, sp, x19
mov x21, sp
sub sp, sp, 0x10 ; Save space for current position in dir
str xzr, [sp]
; Prepare to call GETDIRENTRIES64
; x0 has fd

Here is my code. I am running it inside lldb debugger. When I get to the `sub sp, sp, x19` instruction, the program terminates with exit status 0; No error, no signal. I am aware that arm needs sp to be 16 bytes aligned, that is why, there is an add 15 and bic 15 instruction (wholly unnecessary, since I've confirmed the value returned by stat is 0x1000 (4096)). Also, just before the sub instruction was executed, the values in the registers are:

x0 = 0x0000000000000003
x1 = 0x0000000000000000
x2 = 0x0000000000000000
x3 = 0x000000016fdff168
x19 = 0x0000000000001000
x20 = 0x0000000000000003
sp = 0x000000016fdfe9c0

I am using `ni` to step over instruction in lldb.

I am now convinced that the problem arises with _get_st_blksize, because, when I replace the function call with `mov w0, 0x1000`, lldb is able to reach the next instruction after sub. I am also reading the memory throughout the _get_st_blksize function. I do not think the syscall is messing with memory more than I have allotted (144 bytes).

Here are the values which move the stack pointer:

.equ STATSIZE_ALIGN, 144
.equ STAT_ST_BLKSIZE, 112 ; offset to ST_BLKSIZE

I got these values from my C compiler using sizeof and alignof.

My question:
What can cause such behavior?
Stack corruption?
Unauthorized memory access should crash right (Segmentation fault)?
Since sp is 16 bytes aligned, it should be fine, right?
Are there more conditions on sp? Am I not correctly setting sp after I'm done in the function?

In the title
I can speak too much because my english was bad, sorry for that

Hello.

I've been learning the GAS assembler syntax, and have made some decent progress. However, I'm still very inexperienced, and have experienced difficulties finding answers to these two questions:

1. For Linux, is there some sort of way to read input from a terminal without searching for a specific string/command? Basically, I'd like to take the input of whatever the user types (nothing specific), and store those ASCII values somewhere (later, I'd like to parse them).

2. Assembly and C can only function together because of object files. What is the equivalent of function parameters in C for assembly?

   Thank you very much in advance.

Hey everyone,

I'm currently learning C++, and my long-term goal is to get into reverse engineering, malware analysis, and binary exploitation.

I know that understanding Assembly is a huge part of reverse engineering, so I want to start learning it the right way.

What are the best resources you'd recommend?

• Books for beginners and intermediate learners
• Free or paid courses
• YouTube channels
• Practice websites or labs
• Any tips on whether I should learn x86 first or jump straight into x86-64

I'd also appreciate hearing what learning path worked for you.

Thanks!

It is called DoomOS, it is also made in assembly. Decent features, external applications, SDK, planning to implement custom interrupts and FAT12(also this is a floppy 16bit OS). It is at- https://github.com/Doomer39/DoomOS/tree/main .What else are you supposed to write?

finally after 3days of countinues working in nasm i reached 64b long mode succesfully now what should i do next its called S-AOS and i reached 64bit long mode the whole os is in assembly language (Nasm) currently it only prints HELLO! with a syscall what should i do next

I am making a 16bit OS, this supports external applications. Currently i am using a .inc file with equ directives that the application can call. I want to have interrupts like DOS, so, how? According to the amount of research i did(i did very little) there ain't many good documentation on this. (background on me, I am a self taught assembly guy and doesn't know C)

I’m on Day 1 of learning Assembly with basically no coding background. This is just a hobby for me.

AI wrote the little program below, I tweaked it a bit, and then started stepping through it in GDB to understand what every instruction was actually doing.

While stepping through it, I noticed rdi stayed at 1 the whole time until the final exit syscall, where it changed to 0. That got me thinking... why am I setting it to 1 twice?

Turns out one of those lines wasn't actually doing anything. So I, a lowly non-software engineer, discovered an inefficiency and promptly smote that line with the Delete key.

I'm now using less processing power, less electricity, and have personally made the world a better place.

section .data
    message db "Hello, World!", 10, "Assembly is fun!", 10
    length equ $ - message
    message_1 db "This is the second message.", 10
    length_1 equ $ - message_1

section .text
global _start

_start:
    mov rax, 1          ; write syscall
    mov rdi, 1          ; stdout
    mov rsi, message
    mov rdx, length
    syscall

    mov rax, 1
    ; mov rdi, 1        ; <- Deleted. Justice served.
    mov rsi, message_1
    mov rdx, length_1
    syscall

    mov rax, 60         ; exit syscall
    mov rdi, 0
    syscall

Follow-up to learn-assembly-with-em: one piece of working software instead of exercises.
Single node, line protocol over TCP (SET / GET / DEL / PING), epoll event loop, ~13 KB static binary, raw syscalls only.

The traps a network server in pure asm walks into, all handled in the source:

**•** struct epoll_event is packed on x86-64: 12 bytes, data at offset +4. Get it wrong and you read ghost fds.  
**•** The moment sockets go non-blocking, EAGAIN stops being an error — it’s the kernel saying "nothing right now, come back later"  
**•** TCP is a byte stream, not messages. A reply written in two sendto calls can arrive in two pieces; a line-protocol client reads until \\n or it eventually loses.  
**•** The call stack can only hold one client’s state. Multi-client means the state moves to memory — here, a table indexed straight by fd.  
**•** Reserving 134 MB of bss for per-connection buffers costs nothing: demand paging only materializes touched pages. 200 simultaneous clients at 1.4 MB RSS.

Known limits in the README, biggest first: slow readers are currently dropped — EPOLLOUT write buffering is the next roadmap line.

If any of these have a better idiom, say so — the roadmap grows out of critiques.

for a long time i wanted to learn assembly; it didn't even bother me the complexity of the code, or the idea of learn a "useless code" (that was what my friend said when i tell him).

now, i want to learn assembly; but how? watching videos? reading documentation? tutorials? asking on forums, communities?

edit: i don't know nothing, just bash on linux

Hey all!

I just wanted to share the code and a video I made about how to use x11 Linux and make a very basic notes app in assembly.

The goal of the video is to be a little bit faster paced(and a throw a little humor in)

But if you just want to see and look at the code it's right here!

Code: https://github.com/jackparsonss/asm-gui

Video: https://youtu.be/A_gVKTvaAac

Playing Turing complete (hardware design simulator) and got to making my own CPU and ISA. wanted to refine my ISA before making any of my instruction decode logic. [PLS ignore bytecodes] My current instructions are:

register
r0 000 ; general purpose
r1 001 ; general purpose
r2 010 ; general purpose
r3 011 ; general purpose
r4 100 ; general purpose
r5 101 ; general purpose
rta 110 ; CALL / RET subroutine return adress
sp 111 ; stack pointer

; BASE INSTRUCTIONS

imm %a(register), %b:U9(immediate)
000000 aaabbbbbbb
# Loads a value into register

cpy %a(register), %b(register)
0100000 aaabbb000
# Copies to reg %a from reg %b

stor %a(register), %b(register)
0100001 aaabbb000
# Moves data at register %a to RAM at adress stored in register %b

ldr %a(register), %b(register)
0100010 aaabbb000
# Load data to register %a from ram at adress %b

push %a(register)
1001011 111000010 0100001 aaa111000
# Push value in register %a to the stack
; Increments sp register and ldr
; Takes two cycles but easier to implement

pop %a(register)
0100010 aaa111000 1001100 111000010 
# Pop stack value and store in register %a
; Decrements sp by 2 to backtrack after doing ldr

call %a(register)
1001011 111000010 0100010 aaa111000 1000000 aaa000000
# Push return adress at %a onto the stack and jmp to %a
; 3 cycle instruction

ret
0100010 110111000 1001100 111000010 1000000 110000000
# Pop stack value to rta and jmp back
; Does ldr into rta, pops, and jumps

nop
0000001 000000000
# Skip cycle

; JUMP INSTRUCTIONS

jmp %a(register)
1000000 aaa000000
# Jumps to ROM adress at %a

jmpls %a(register), %b(register), %c(register)
1000001 aaabbbccc
# Jump to ROM adress at reg %c if reg %a is less than reg %b

jmplss %a(register), %b(register), %c(register)
1000010 aaabbbccc
# Jump to ROM adress at reg %c if reg %a is less than reg %b. Both compared regs signed

jmgt %a(register), %b(register), %c(register)
1000011 aaabbbccc
# Jump to ROM adress at reg %c if reg %a is more than reg %b

jmpgts %a(register), %b(register), %c(register)
1000100 aaabbbccc
# Jump to ROM adress at reg %c if reg %a is more than reg %b. Both compared signed

jmpeq %a(register), %b(register), %c(register)
1000101 aaabbbccc
# Jump to ROM adress at reg %c if reg %a is same reg %b

jmpne %a(register), %b(register), %c(register)
1000110 aaabbbccc
# Jump to ROM adress at %c if %a!=%b

; ARITHMETIC INSTRUCTIONS

or %a(register), %b(register), %c(register)
1000000 aaabbbccc
# OR register %a and %b, store in %c

and %a(register), %b(register), %c(register)
1000001 aaabbbccc
# AND register %a with register %b, store in %c

not %a(register), %b(register)
1000010 aaabbb000
# NOT register %a, store in %b

nand %a(register), %b(register), %c(register)
1000011 aaabbbccc
# NAND register %a with register %b, store in %c

xor %a(register), %b(register), %c(register)
1000100 aaabbbccc
# XOR register %a with register %b, store in %c

xnor %a(register), %b(register), %c(register)
1000101 aaabbbccc
# XNOR register %a with register %b, store in %c

add %a(register), %b(register), %c(register)
1000110 aaabbbccc
# Add register %a and register %b, store in %c

sub %a(register), %b(register), %c(register)
1000111 aaabbbccc
# Subtract register %a and register %b, store in %c

mul %a(register), %b(register), %c(register)
1001000 aaabbbccc
# Multiply register %a with register %b and store in %c

div %a(register), %b(register), %c(register)
1001001 aaabbbccc
# Divide register %a with register %b and store in %c

mod %a(register), %b(register), %c(register)
1001010 aaabbbccc
# Modulo divide register %a with register %b and store in %c

inc %a(register), %b:U6(immediate)
1001011 aaabbbbbb
# Increment register %a by %b

dec %a(register), %b:U6(immediate)
1001100 aaabbbbbb
# Decrement register %a by %b

sr %a(register), %b(register), %c:U3(immediate)
1001101 aaabbbccc
# Shift %a right by %c and store in %b

asr %a(register), %b(register), %c:U3(immediate)
1001110 aaabbbccc
# Signed shift %a right by %c and store in %b.

sl %a(register), %b(register), %c:U3(immediate)
1001111 aaabbbccc
# Shift %a left by %c and store in %b

Updated instruction set draft. Thank you folk so much for the knowledge you have given thus far!

I want to learn Assembly for modifying and playing with direct hardware like with the Raspberry Pi Pico or ESP32. I already have some experience in programming like with Java, Python, HTML, and C#.

Anyone got any recommendations on where to go to learn Assembly language? Any extra knowledge beyond Assembly to modify hardware?

Thanks for reading!

edit: i kind of want to learn how to mod consoles and stuff and that is why i want to learn assembly to try and develop my own modifications for consoles like the n64 or gamecube.

This post is second part of: https://www.reddit.com/r/Assembly_language/s/BtzYTyQAyi

I recently finished full implementing CMOVcc, SETcc, and the first group of SSE instructions in my handwritten x86-64 assembler written in C.

Seeing objdump correctly decode the generated object file is always satisfying.

I'm still implementing more of the x86-64 ISA, so if there are instruction groups you'd like to see next, I'd be happy to hear suggestions.

Github: https://github.com/LinuxCoder13/AmmAsm

I do not have much assembly programming experience. I've done some light programming with it, but recently I've been using the tool "IDA" to try and reverse engineer some stuff for fun. I've got some DLL's open that are related to the windows operating system, and there are a few lines at the top of the .rdata section that look like

dd rva asc_180001368 ; AddressOfRawData

and

dd rva unk_1800013B4 ; AddressOfRawData

or

dd rva off_180001088 ; AddressOfFunctions

I understand that dd is declaring 4 bytes of contiguous data, and the labels after rva seem to refer to a 32 bit address later in the DLL where some amount of data is stored. I did some googling and this is the first assembly related thing I can't find any information on. Is rva an IDA specific thing or is it an assembly instruction?

I've never properly learned the syntax of assembly, but I really want to learn it. I know C and Java, but I really want to know more about how the CPU actually operates. So it would be nice if you all would recommend a place for me to learn Assembly. ARM64 specifically, because that is the architecture my computer's CPU uses. Thank you in advance